File tree Expand file tree Collapse file tree 1 file changed +3
-3
lines changed Expand file tree Collapse file tree 1 file changed +3
-3
lines changed Original file line number Diff line number Diff line change @@ -43,7 +43,7 @@ def __init__(
43
43
self ._timeout = timeout
44
44
self .rx_pio = None
45
45
if rx :
46
- if rts :
46
+ if rts :
47
47
# Fleshed-out 8n1 UART receiver with hardware flow control handling
48
48
# framing errors and break conditions more gracefully.
49
49
# Wait for the start bit whilst updating rts with the FIFO level
@@ -87,7 +87,7 @@ def __init__(
87
87
auto_push = False ,
88
88
push_threshold = self .bitcount ,
89
89
first_out_pin = rts ,
90
- mov_status_type = ' rxfifo' ,
90
+ mov_status_type = " rxfifo" ,
91
91
mov_status_n = 7 ,
92
92
)
93
93
else :
@@ -137,7 +137,7 @@ def __init__(
137
137
138
138
# Line by line explanation:
139
139
# * Assert stop bit, or stall with line in idle state
140
- # * Wait for CTS# before transmitting
140
+ # * Wait for CTS# before transmitting
141
141
# * Preload bit counter, assert start bit for 8 clocks
142
142
# * This loop will run 8 times (8n1 UART)
143
143
# * Shift 1 bit from OSR to the first OUT pin
You can’t perform that action at this time.
0 commit comments