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T-Impulse cleanup
1 parent b1227c0 commit b3b3e09

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2 files changed

+20
-18
lines changed

2 files changed

+20
-18
lines changed

variants/T-IMPULSE-S76G/variant.cpp

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -57,13 +57,10 @@ extern const PinDescription g_APinDescription[PINS_COUNT] =
5757
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB7), STM32L0_GPIO_PIN_PB7, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //SDA
5858
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB6), STM32L0_GPIO_PIN_PB6, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //SCL
5959
// 16 - Analog pin
60-
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC4), STM32L0_GPIO_PIN_PC4, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_14 }, //BAT_VOL_DET
61-
// 17..21 - Special pins (USB_DM, USB_DP, no USB_VBUS, SWD)
60+
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC4), STM32L0_GPIO_PIN_PC4, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_14 }, //PIN_VBAT
61+
// 17..18 - Special pins (USB_DM, USB_DP)
6262
{ NULL, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA11), STM32L0_GPIO_PIN_PA11, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //DM
6363
{ NULL, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA12), STM32L0_GPIO_PIN_PA12, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //DP
64-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //VBUS_USB
65-
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA13), STM32L0_GPIO_PIN_PA13, (PIN_ATTR_SWD | PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //SWCLK
66-
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA14), STM32L0_GPIO_PIN_PA14, (PIN_ATTR_SWD | PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //SWDIO
6764
};
6865

6966
static uint8_t stm32l0_usart4_rx_fifo[32];
@@ -94,13 +91,16 @@ extern const stm32l0_i2c_params_t g_WireParams = {
9491
},
9592
};
9693

94+
extern stm32l0_i2c_t g_Wire;
95+
9796
void RadioInit( const RadioEvents_t *events, uint32_t freq )
9897
{
9998
SX1276Init(events, freq);
10099
}
101100

102101
void initVariant()
103102
{
103+
//S76G_Initialize(STM32L0_GPIO_PIN_PD7, STM32L0_GPIO_PIN_NONE);
104104
// Enable 1V8 Power Switch
105105
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PB0, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
106106
stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PB0, 1);
@@ -129,6 +129,9 @@ void initVariant()
129129
// Set Ant Rx/Tx switch to Rx Mode
130130
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA1, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
131131
stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PA1, 1);
132+
// Disable TCXO_EN pin
133+
//stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PD7, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
134+
//stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PD7, 0);
132135
// Configure RESET as input
133136
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PB10, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_MODE_ANALOG));
134137
armv6m_core_udelay(6000); // Wait 6 ms

variants/T-IMPULSE-S76G/variant.h

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -42,20 +42,20 @@
4242
#define STM32L0_CONFIG_PIN_VBAT STM32L0_GPIO_PIN_PC4
4343
#define STM32L0_CONFIG_CHANNEL_VBAT STM32L0_ADC_CHANNEL_14
4444
#define STM32L0_CONFIG_VBAT_PERIOD 40
45-
#define STM32L0_CONFIG_VBAT_SCALE ((float)1.27)
45+
#define STM32L0_CONFIG_VBAT_SCALE ((float)2.08)
4646

4747
#define STM32L0_CONFIG_PIN_GNSS_ENABLE STM32L0_GPIO_PIN_PA3
48-
#define STM32L0_CONFIG_PIN_LEV_SHIFT_EN STM32L0_GPIO_PIN_PC6
48+
#define STM32L0_CONFIG_PIN_LSHIFTER_EN STM32L0_GPIO_PIN_PC6
4949
#define STM32L0_CONFIG_PIN_GNSS_PPS STM32L0_GPIO_PIN_PB5
5050
#define STM32L0_CONFIG_PIN_GNSS_RX STM32L0_GPIO_PIN_PC11_USART4_RX
5151
#define STM32L0_CONFIG_PIN_GNSS_TX STM32L0_GPIO_PIN_PC10_USART4_TX
52-
#define GPS_PWR_SWITCH (2ul) //PA3
53-
#define GPS_LEVEL_SHIFTER_EN (3ul) //PC6
54-
#define GPS_RST (4ul) //PB2
55-
#define GPS_RX (5ul) //PC11
56-
#define GPS_TX (6ul) //PC10
57-
#define GPS_PPS (7ul) //PB5
58-
#define GPS_BAUD_RATE 115200
52+
#define GPS_PWR_SWITCH (2ul)
53+
#define GPS_LEVEL_SHIFTER_EN (3ul)
54+
#define GPS_RST (4ul)
55+
#define GPS_RX (5ul)
56+
#define GPS_TX (6ul)
57+
#define GPS_PPS (7ul)
58+
#define GPS_BAUD_RATE 115200
5959

6060
#define USBCON
6161

@@ -81,15 +81,16 @@ extern "C"
8181
*----------------------------------------------------------------------------*/
8282

8383
// Number of pins defined in PinDescription array
84-
#define PINS_COUNT (22u)
85-
#define NUM_DIGITAL_PINS (21u)
84+
#define PINS_COUNT (19u)
85+
#define NUM_DIGITAL_PINS (18u)
8686
#define NUM_ANALOG_INPUTS (1u)
8787
#define NUM_ANALOG_OUTPUTS (0u)
8888

8989
/*
9090
* Analog pins
9191
*/
9292
#define PIN_A0 (16ul)
93+
#define PIN_VBAT (16ul)
9394

9495
static const uint8_t A0 = PIN_A0;
9596

@@ -132,8 +133,6 @@ static const uint8_t SCL = PIN_WIRE_SCL;
132133
*/
133134
#define PIN_USB_DM (17ul)
134135
#define PIN_USB_DP (18ul)
135-
#define PIN_USB_VBUS (19ul)
136-
137136

138137
#ifdef __cplusplus
139138
}

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