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vtr_flow/tasks/regression_tests/vtr_reg_strong
strong_cin_tie_off/config
strong_place_delay_model/config
strong_soft_multipliers/config Expand file tree Collapse file tree 4 files changed +16
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lines changed Original file line number Diff line number Diff line change 1- arch circuit script_params vtr_flow_elapsed_time error odin_synth_time max_odin_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_revision vpr_status hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile crit_path_route_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length
2- k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 0.99 0.01 5508 1 0.00 -1 -1 29784 -1 -1 3 9 0 -1 v8.0.0-1603-g6c2a712a0 success betzgrp-wintermute.eecg.utoronto.ca /home/kmurray/trees/vtr3/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run005/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_4x4.v/common 25872 9 8 71 66 1 37 20 5 5 25 clb auto 0.45 85 0.04 2.22275 -22.7102 -2.22275 26 199 19 151211 75605.7 37105.9 1484.24 0.04 166 14 147 195 5055 2690 3.84065 3.84065 -36.0874 -3.84065 0 0 45067.1 1802.68 0.01 14 16 16 6 0 0
3- k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 2.91 0.02 5932 1 0.02 -1 -1 30248 -1 -1 8 19 0 -1 v8.0.0-1603-g6c2a712a0 success betzgrp-wintermute.eecg.utoronto.ca /home/kmurray/trees/vtr3/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run005/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_9x9.v/common 28692 19 18 299 240 1 150 45 6 6 36 clb auto 1.79 498 0.11 3.67246 -67.9518 -3.67246 52 1244 30 403230 201615 110337. 3064.92 0.38 980 19 973 1386 60799 23055 5.39047 5.39047 -120.052 -5.39047 0 0 143382. 3982.83 0.03 62 81 85 13 0 0
1+ arch circuit script_params vtr_flow_elapsed_time error odin_synth_time max_odin_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile crit_path_route_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length
2+ k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 1.32 0.01 5904 1 0.02 -1 -1 33020 -1 -1 3 9 0 -1 success v8.0.0-3766-g758cef2ab release IPO VTR_ASSERT_LEVEL=3 GNU 9.2.1 on Linux-4.15.0-88-generic x86_64 2020-04-15T10:35:35 acomodi /data/vtr-symbiflow/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run002/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_4x4.v/common 27192 9 8 71 66 1 37 20 5 5 25 clb auto 0.76 85 0.08 2.22275 -22.7102 -2.22275 26 303 29 151211 75605.7 37105.9 1484.24 0.09 213 15 172 232 8312 4404 3.17075 3.17075 -40.2482 -3.17075 0 0 45067.1 1802.68 0.02 14 16 16 6 0 0
3+ k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 4.03 0.01 6260 1 0.02 -1 -1 33008 -1 -1 8 19 0 -1 success v8.0.0-3766-g758cef2ab release IPO VTR_ASSERT_LEVEL=3 GNU 9.2.1 on Linux-4.15.0-88-generic x86_64 2020-04-15T10:35:35 acomodi /data/vtr-symbiflow/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run002/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_9x9.v/common 30008 19 18 299 240 1 150 45 6 6 36 clb auto 2.74 498 0.24 3.67246 -67.9518 -3.67246 52 1339 29 403230 201615 110337. 3064.92 0.45 1036 22 1111 1712 64617 24432 5.93928 5.93928 -126.891 -5.93928 0 0 143382. 3982.83 0.04 62 81 85 13 0 0
Original file line number Diff line number Diff line change 1- arch circuit script_params vtr_flow_elapsed_time error odin_synth_time max_odin_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_revision vpr_status hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile crit_path_route_time
2- stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta 20.93 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 v8.0.0-1603-g6c2a712a0 success betzgrp-wintermute.eecg.utoronto.ca /home/kmurray/trees/vtr3/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/run005/stratixiv_arch.timing.xml/styr.blif/common_--place_delay_model_delta 780872 10 10 168 178 1 62 30 10 7 70 io LAB auto 0.35 324 1.27 6.37429 -70.0869 -6.37429 20 650 20 0 0 74567.7 1065.25 0.42 639 16 342 1172 140579 70772 6.7019 6.7019 -75.5604 -6.7019 0 0 92858.8 1326.55 0.05
3- stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override 20.22 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 v8.0.0-1603-g6c2a712a0 success betzgrp-wintermute.eecg.utoronto.ca /home/kmurray/trees/vtr3/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/run005/stratixiv_arch.timing.xml/styr.blif/common_--place_delay_model_delta_override 781336 10 10 168 178 1 62 30 10 7 70 io LAB auto 0.34 333 1.34 6.36281 -70.0919 -6.36281 18 674 22 0 0 66239.6 946.281 0.39 667 13 338 1345 144539 75270 6.92909 6.92909 -76.3891 -6.92909 0 0 84868.6 1212.41 0.06
1+ arch circuit script_params vtr_flow_elapsed_time error odin_synth_time max_odin_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile crit_path_route_time
2+ stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta 22.85 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-3766-g758cef2ab release IPO VTR_ASSERT_LEVEL=3 GNU 9.2.1 on Linux-4.15.0-88-generic x86_64 2020-04-15T10:35:35 acomodi /data/vtr-symbiflow/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/run002/stratixiv_arch.timing.xml/styr.blif/common_--place_delay_model_delta 783280 10 10 168 178 1 62 30 10 7 70 io LAB auto 0.44 333 1.61 6.49764 -70.4252 -6.49764 18 980 42 0 0 66239.6 946.281 1.43 736 17 451 1744 149929 69803 7.50396 7.50396 -81.1686 -7.50396 0 0 84868.6 1212.41 0.05
3+ stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override 22.13 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-3766-g758cef2ab release IPO VTR_ASSERT_LEVEL=3 GNU 9.2.1 on Linux-4.15.0-88-generic x86_64 2020-04-15T10:35:35 acomodi /data/vtr-symbiflow/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/run002/stratixiv_arch.timing.xml/styr.blif/common_--place_delay_model_delta_override 782712 10 10 168 178 1 62 30 10 7 70 io LAB auto 0.40 327 1.94 6.34588 -69.8962 -6.34588 18 807 17 0 0 66239.6 946.281 0.36 655 14 354 1175 104496 47766 6.94046 6.94046 -76.9845 -6.94046 0 0 84868.6 1212.41 0.04
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