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1 parent 8877c92 commit e81df0cCopy full SHA for e81df0c
configs/defconfig.esp32s3
@@ -9,6 +9,9 @@ CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
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CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=3120
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
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+# S3 Display shift fix -> https://espressif-docs.readthedocs-hosted.com/projects/esp-faq/en/latest/software-framework/peripherals/lcd.html
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+CONFIG_LCD_RGB_RESTART_IN_VSYNC=y
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+
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CONFIG_ULP_COPROC_ENABLED=y
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CONFIG_ULP_COPROC_TYPE_RISCV=y
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CONFIG_ULP_COPROC_RESERVE_MEM=4096
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