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Merge tag 'x86-urgent-2023-05-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cpu fix from Thomas Gleixner: "A single fix for x86: - Prevent a bogus setting for the number of HT siblings, which is caused by the CPUID evaluation trainwreck of X86. That recomputes the value for each CPU, so the last CPU "wins". That can cause completely bogus sibling values" * tag 'x86-urgent-2023-05-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/topology: Fix erroneous smp_num_siblings on Intel Hybrid platforms
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arch/x86/kernel/cpu/topology.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ int detect_extended_topology_early(struct cpuinfo_x86 *c)
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* initial apic id, which also represents 32-bit extended x2apic id.
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*/
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c->initial_apicid = edx;
82-
smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
82+
smp_num_siblings = max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
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#endif
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return 0;
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}
@@ -109,7 +109,8 @@ int detect_extended_topology(struct cpuinfo_x86 *c)
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*/
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cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
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c->initial_apicid = edx;
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core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
112+
core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
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smp_num_siblings = max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
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core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
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die_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
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pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);

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