Skip to content

Commit 1db674b

Browse files
arsenmarsenm
committed
InferAddressSpaces: Convert test to generated checks
Also use named values
1 parent 6a84af7 commit 1db674b

File tree

1 file changed

+98
-53
lines changed

1 file changed

+98
-53
lines changed

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/builtin-assumed-addrspace.ll

+98-53
Original file line numberDiff line numberDiff line change
@@ -1,84 +1,129 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces -o - %s | FileCheck %s
23

3-
; CHECK-LABEL: @f0
4-
; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(3)
5-
; CHECK: getelementptr inbounds float, ptr addrspace(3)
6-
; CHECK: load float, ptr addrspace(3)
74
define float @f0(ptr %p) {
5+
; CHECK-LABEL: define float @f0(
6+
; CHECK-SAME: ptr [[P:%.*]]) {
7+
; CHECK-NEXT: [[ENTRY:.*:]]
8+
; CHECK-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[P]])
9+
; CHECK-NEXT: tail call void @llvm.assume(i1 [[IS_SHARED]])
10+
; CHECK-NEXT: [[WORKITEM_ID_X:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
11+
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[WORKITEM_ID_X]] to i64
12+
; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(3)
13+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP0]], i64 [[IDXPROM]]
14+
; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr addrspace(3) [[ARRAYIDX]], align 4
15+
; CHECK-NEXT: ret float [[LOAD]]
16+
;
817
entry:
9-
%0 = call i1 @llvm.amdgcn.is.shared(ptr %p)
10-
tail call void @llvm.assume(i1 %0)
11-
%1 = tail call i32 @llvm.amdgcn.workitem.id.x()
12-
%idxprom = zext i32 %1 to i64
18+
%is.shared = call i1 @llvm.amdgcn.is.shared(ptr %p)
19+
tail call void @llvm.assume(i1 %is.shared)
20+
%workitem.id.x = tail call i32 @llvm.amdgcn.workitem.id.x()
21+
%idxprom = zext i32 %workitem.id.x to i64
1322
%arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom
14-
%2 = load float, ptr %arrayidx, align 4
15-
ret float %2
23+
%load = load float, ptr %arrayidx, align 4
24+
ret float %load
1625
}
1726

18-
; CHECK-LABEL: @f1
19-
; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(5)
20-
; CHECK: getelementptr inbounds float, ptr addrspace(5)
21-
; CHECK: load float, ptr addrspace(5)
2227
define float @f1(ptr %p) {
28+
; CHECK-LABEL: define float @f1(
29+
; CHECK-SAME: ptr [[P:%.*]]) {
30+
; CHECK-NEXT: [[ENTRY:.*:]]
31+
; CHECK-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(ptr [[P]])
32+
; CHECK-NEXT: tail call void @llvm.assume(i1 [[IS_PRIVATE]])
33+
; CHECK-NEXT: [[WORKITEM_ID_X:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
34+
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[WORKITEM_ID_X]] to i64
35+
; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(5)
36+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr addrspace(5) [[TMP0]], i64 [[IDXPROM]]
37+
; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr addrspace(5) [[ARRAYIDX]], align 4
38+
; CHECK-NEXT: ret float [[LOAD]]
39+
;
2340
entry:
24-
%0 = call i1 @llvm.amdgcn.is.private(ptr %p)
25-
tail call void @llvm.assume(i1 %0)
26-
%1 = tail call i32 @llvm.amdgcn.workitem.id.x()
27-
%idxprom = zext i32 %1 to i64
41+
%is.private = call i1 @llvm.amdgcn.is.private(ptr %p)
42+
tail call void @llvm.assume(i1 %is.private)
43+
%workitem.id.x = tail call i32 @llvm.amdgcn.workitem.id.x()
44+
%idxprom = zext i32 %workitem.id.x to i64
2845
%arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom
29-
%2 = load float, ptr %arrayidx, align 4
30-
ret float %2
46+
%load = load float, ptr %arrayidx, align 4
47+
ret float %load
3148
}
3249

33-
; CHECK-LABEL: @f2
34-
; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(1)
35-
; CHECK: getelementptr inbounds float, ptr addrspace(1)
36-
; CHECK: load float, ptr addrspace(1)
3750
define float @f2(ptr %p) {
51+
; CHECK-LABEL: define float @f2(
52+
; CHECK-SAME: ptr [[P:%.*]]) {
53+
; CHECK-NEXT: [[ENTRY:.*:]]
54+
; CHECK-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(ptr [[P]])
55+
; CHECK-NEXT: [[NOT_PRIVATE:%.*]] = xor i1 [[IS_PRIVATE]], true
56+
; CHECK-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[P]])
57+
; CHECK-NEXT: [[NOT_SHARED:%.*]] = xor i1 [[IS_SHARED]], true
58+
; CHECK-NEXT: [[NOT_PRIVATE_AND_NOT_SHARED:%.*]] = and i1 [[NOT_PRIVATE]], [[NOT_SHARED]]
59+
; CHECK-NEXT: tail call void @llvm.assume(i1 [[NOT_PRIVATE_AND_NOT_SHARED]])
60+
; CHECK-NEXT: [[WORKITEM_ID_X:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
61+
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[WORKITEM_ID_X]] to i64
62+
; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(1)
63+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[TMP0]], i64 [[IDXPROM]]
64+
; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr addrspace(1) [[ARRAYIDX]], align 4
65+
; CHECK-NEXT: ret float [[LOAD]]
66+
;
3867
entry:
39-
%0 = call i1 @llvm.amdgcn.is.private(ptr %p)
40-
%1 = xor i1 %0, -1
41-
%2 = call i1 @llvm.amdgcn.is.shared(ptr %p)
42-
%3 = xor i1 %2, -1
43-
%4 = and i1 %1, %3
44-
tail call void @llvm.assume(i1 %4)
45-
%5 = tail call i32 @llvm.amdgcn.workitem.id.x()
46-
%idxprom = zext i32 %5 to i64
68+
%is.private = call i1 @llvm.amdgcn.is.private(ptr %p)
69+
%not.private = xor i1 %is.private, true
70+
%is.shared = call i1 @llvm.amdgcn.is.shared(ptr %p)
71+
%not.shared = xor i1 %is.shared, true
72+
%not.private.and.not.shared = and i1 %not.private, %not.shared
73+
tail call void @llvm.assume(i1 %not.private.and.not.shared)
74+
%workitem.id.x = tail call i32 @llvm.amdgcn.workitem.id.x()
75+
%idxprom = zext i32 %workitem.id.x to i64
4776
%arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom
48-
%6 = load float, ptr %arrayidx, align 4
49-
ret float %6
77+
%load = load float, ptr %arrayidx, align 4
78+
ret float %load
5079
}
5180

52-
; CHECK-LABEL: @g0
53-
; CHECK: if.then:
54-
; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(3)
55-
; CHECK: getelementptr inbounds float, ptr addrspace(3)
56-
; CHECK: load float, ptr addrspace(3)
57-
; CHECK: if.end:
58-
; CHECK: getelementptr inbounds float, ptr
59-
; CHECK: load float, ptr
6081
define float @g0(i32 %c, ptr %p) {
82+
; CHECK-LABEL: define float @g0(
83+
; CHECK-SAME: i32 [[C:%.*]], ptr [[P:%.*]]) {
84+
; CHECK-NEXT: [[ENTRY:.*]]:
85+
; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[C]], 0
86+
; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]
87+
; CHECK: [[IF_THEN]]:
88+
; CHECK-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[P]])
89+
; CHECK-NEXT: tail call void @llvm.assume(i1 [[IS_SHARED]])
90+
; CHECK-NEXT: [[WORKITEM_ID_X_0:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
91+
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[WORKITEM_ID_X_0]] to i64
92+
; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(3)
93+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP0]], i64 [[IDXPROM]]
94+
; CHECK-NEXT: [[LOAD0:%.*]] = load float, ptr addrspace(3) [[ARRAYIDX]], align 4
95+
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[LOAD0]], 0.000000e+00
96+
; CHECK-NEXT: br label %[[IF_END]]
97+
; CHECK: [[IF_END]]:
98+
; CHECK-NEXT: [[S:%.*]] = phi float [ [[ADD]], %[[IF_THEN]] ], [ 0.000000e+00, %[[ENTRY]] ]
99+
; CHECK-NEXT: [[WORKITEM_ID_X_1:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.y()
100+
; CHECK-NEXT: [[IDXPROM2:%.*]] = zext i32 [[WORKITEM_ID_X_1]] to i64
101+
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[P]], i64 [[IDXPROM2]]
102+
; CHECK-NEXT: [[LOAD1:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
103+
; CHECK-NEXT: [[ADD2:%.*]] = fadd float [[S]], [[LOAD1]]
104+
; CHECK-NEXT: ret float [[ADD2]]
105+
;
61106
entry:
62107
%tobool.not = icmp eq i32 %c, 0
63108
br i1 %tobool.not, label %if.end, label %if.then
64109

65110
if.then:
66-
%0 = call i1 @llvm.amdgcn.is.shared(ptr %p)
67-
tail call void @llvm.assume(i1 %0)
68-
%1 = tail call i32 @llvm.amdgcn.workitem.id.x()
69-
%idxprom = zext i32 %1 to i64
111+
%is.shared = call i1 @llvm.amdgcn.is.shared(ptr %p)
112+
tail call void @llvm.assume(i1 %is.shared)
113+
%workitem.id.x.0 = tail call i32 @llvm.amdgcn.workitem.id.x()
114+
%idxprom = zext i32 %workitem.id.x.0 to i64
70115
%arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom
71-
%2 = load float, ptr %arrayidx, align 4
72-
%add = fadd float %2, 0.
116+
%load0 = load float, ptr %arrayidx, align 4
117+
%add = fadd float %load0, 0.0
73118
br label %if.end
74119

75120
if.end:
76-
%s = phi float [ %add, %if.then ], [ 0., %entry ]
77-
%3 = tail call i32 @llvm.amdgcn.workitem.id.y()
78-
%idxprom2 = zext i32 %3 to i64
121+
%s = phi float [ %add, %if.then ], [ 0.0, %entry ]
122+
%workitem.id.x.1 = tail call i32 @llvm.amdgcn.workitem.id.y()
123+
%idxprom2 = zext i32 %workitem.id.x.1 to i64
79124
%arrayidx2 = getelementptr inbounds float, ptr %p, i64 %idxprom2
80-
%4 = load float, ptr %arrayidx2, align 4
81-
%add2 = fadd float %s, %4
125+
%load1 = load float, ptr %arrayidx2, align 4
126+
%add2 = fadd float %s, %load1
82127
ret float %add2
83128
}
84129

0 commit comments

Comments
 (0)