Merge branch 'master' of https://github.com/Baptou88/arduino-esp32

Author: Baptou88

.github/workflows/docs.yml

@@ -22,10 +22,10 @@ jobs:
       run:
         shell: bash
     steps:
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         submodules: true
-    - uses: actions/setup-python@v2
+    - uses: actions/setup-python@v4
       with:
         python-version: '3.x'
     - name: Build

.github/workflows/gh-pages.yml

@@ -16,7 +16,7 @@ jobs:
     name: Build GitHub Pages
     runs-on: ubuntu-latest
     steps:
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
     - name: Copy Files
       env:
         GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/hil.yml

@@ -25,7 +25,7 @@ jobs:
       chunks: ${{ steps.gen-chunks.outputs.chunks }}
     steps:
       - name: Checkout Repository
-        uses: actions/checkout@v2
+        uses: actions/checkout@v3
 
       - name: Generate Chunks matrix
         id: gen-chunks
@@ -52,7 +52,7 @@ jobs:
 
     steps:
       - name: Checkout Repository
-        uses: actions/checkout@v2
+        uses: actions/checkout@v3
 
       - name: Build sketches
         run: |
@@ -84,7 +84,7 @@ jobs:
 
     steps:
        - name: Checkout repository
-         uses: actions/checkout@v2
+         uses: actions/checkout@v3
 
        - name: Download ${{matrix.chip}}-${{matrix.chunks}} artifacts
          uses: actions/download-artifact@v2

.github/workflows/push.yml

@@ -18,7 +18,7 @@ jobs:
     name: Check cmake file
     runs-on: ubuntu-latest
     steps:
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
     - run: bash ./.github/scripts/check-cmakelists.sh
 
   # Ubuntu
@@ -30,13 +30,13 @@ jobs:
         chunk: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14]
 
     steps:
-    - uses: actions/checkout@v2
-    - uses: actions/setup-python@v2
+    - uses: actions/checkout@v3
+    - uses: actions/setup-python@v4
       with:
         python-version: '3.x'
     - name: Cache tools
       id: cache-linux
-      uses: actions/cache@v2
+      uses: actions/cache@v3
       with:
         path: |
           ./tools/dist
@@ -56,8 +56,8 @@ jobs:
         os: [windows-latest, macOS-latest]
 
     steps:
-    - uses: actions/checkout@v2
-    - uses: actions/setup-python@v2
+    - uses: actions/checkout@v3
+    - uses: actions/setup-python@v4
       with:
         python-version: '3.x'
     - name: Build Sketches
@@ -72,8 +72,8 @@ jobs:
         os: [ubuntu-latest, windows-latest, macOS-latest]
 
     steps:
-    - uses: actions/checkout@v2
-    - uses: actions/setup-python@v2
+    - uses: actions/checkout@v3
+    - uses: actions/setup-python@v4
       with:
         python-version: '3.x'
     - name: Build Sketches
@@ -93,7 +93,7 @@ jobs:
     container: espressif/idf:${{ matrix.idf_ver }}
     steps:
       - name: Check out arduino-esp32 as a component
-        uses: actions/checkout@v2
+        uses: actions/checkout@v3
         with:
           submodules: recursive
           path: components/arduino-esp32

.github/workflows/release.yml

@@ -10,10 +10,10 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         fetch-depth: 0
-    - uses: actions/setup-python@v2
+    - uses: actions/setup-python@v4
       with:
         python-version: '3.x'
     - name: Build Release

.github/workflows/upload-idf-component.yml

@@ -7,7 +7,7 @@ jobs:
   upload_components:
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v3
         with:
           submodules: "recursive"
 

boards.txt

@@ -11515,6 +11515,31 @@ heltec_wifi_lora_32.build.boot=dio
 heltec_wifi_lora_32.build.partitions=default
 heltec_wifi_lora_32.build.defines=-D{build.band} -DLoRaWAN_DEBUG_LEVEL={build.LoRaWanDebugLevel} -DACTIVE_REGION=LORAMAC_{build.band} {build.psram}
 
+heltec_wifi_lora_32.menu.PartitionScheme.default=Regular 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+heltec_wifi_lora_32.menu.PartitionScheme.default.build.partitions=default
+heltec_wifi_lora_32.menu.PartitionScheme.defaultffat=Regular 4MB with ffat (1.2MB APP/1.5MB FATFS)
+heltec_wifi_lora_32.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+heltec_wifi_lora_32.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+heltec_wifi_lora_32.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+heltec_wifi_lora_32.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+heltec_wifi_lora_32.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+heltec_wifi_lora_32.menu.PartitionScheme.minimal.build.partitions=minimal
+heltec_wifi_lora_32.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+heltec_wifi_lora_32.menu.PartitionScheme.huge_app.build.partitions=huge_app
+heltec_wifi_lora_32.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+heltec_wifi_lora_32.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+heltec_wifi_lora_32.menu.PartitionScheme.no_ota.build.partitions=no_ota
+heltec_wifi_lora_32.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+heltec_wifi_lora_32.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+heltec_wifi_lora_32.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+heltec_wifi_lora_32.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+heltec_wifi_lora_32.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+heltec_wifi_lora_32.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+heltec_wifi_lora_32.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+heltec_wifi_lora_32.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+heltec_wifi_lora_32.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+heltec_wifi_lora_32.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+
 heltec_wifi_lora_32.menu.PSRAM.disabled=Disabled
 heltec_wifi_lora_32.menu.PSRAM.disabled.build.psram=
 heltec_wifi_lora_32.menu.PSRAM.disabled.build.extra_libs=

cores/esp32/HardwareSerial.cpp

@@ -145,6 +145,10 @@ _eventTask(NULL)
 #if !CONFIG_DISABLE_HAL_LOCKS
     ,_lock(NULL)
 #endif
+,_rxPin(-1) 
+,_txPin(-1)
+,_ctsPin(-1)
+,_rtsPin(-1)
 {
 #if !CONFIG_DISABLE_HAL_LOCKS
     if(_lock == NULL){
@@ -384,7 +388,8 @@ void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, in
 
     // Set UART RX timeout
     uartSetRxTimeout(_uart, _rxTimeout);
-
+    _rxPin = rxPin;
+    _txPin = txPin;
     HSERIAL_MUTEX_UNLOCK();
 }
 
@@ -403,6 +408,8 @@ void HardwareSerial::end(bool fullyTerminate)
         if (uartGetDebug() == _uart_nr) {
             uartSetDebug(0);
         }
+        uartDetachPins(_uart, _rxPin, _txPin, _ctsPin, _rtsPin);
+        _rxPin = _txPin = _ctsPin = _rtsPin = -1;
     }
     delay(10);
     uartEnd(_uart);
@@ -507,10 +514,19 @@ void HardwareSerial::setRxInvert(bool invert)
 void HardwareSerial::setPins(int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin)
 {
     if(_uart == NULL) {
-        log_e("setPins() shall be called after begin() - nothing done");
+        log_e("setPins() shall be called after begin() - nothing done\n");
         return;
     }
-    uartSetPins(_uart, rxPin, txPin, ctsPin, rtsPin);
+
+    // uartSetPins() checks if pins are valid for each function and for the SoC 
+    if (uartSetPins(_uart, rxPin, txPin, ctsPin, rtsPin)) {
+        _txPin = _txPin >= 0 ? txPin : _txPin;
+        _rxPin = _rxPin >= 0 ? rxPin : _rxPin;
+        _rtsPin = _rtsPin >= 0 ? rtsPin : _rtsPin;
+        _ctsPin = _ctsPin >= 0 ? ctsPin : _ctsPin;
+    } else {
+        log_e("Error when setting Serial port Pins. Invalid Pin.\n");
+    }
 }
 
 // Enables or disables Hardware Flow Control using RTS and/or CTS pins (must use setAllPins() before)

cores/esp32/HardwareSerial.h

@@ -176,6 +176,7 @@ class HardwareSerial: public Stream
 #if !CONFIG_DISABLE_HAL_LOCKS
     SemaphoreHandle_t _lock;
 #endif
+    int8_t _rxPin, _txPin, _ctsPin, _rtsPin;
 
     void _createEventTask(void *args);
     void _destroyEventTask(void);

cores/esp32/esp32-hal-uart.c

@@ -23,6 +23,9 @@
 #include "soc/soc_caps.h"
 #include "soc/uart_struct.h"
 
+#include "hal/gpio_hal.h"
+#include "esp_rom_gpio.h"
+
 static int s_uart_debug_nr = 0;
 
 struct uart_struct_t {
@@ -69,6 +72,40 @@ static uart_t _uart_bus_array[] = {
 
 #endif
 
+// IDF UART has no detach function. As consequence, after ending a UART, the previous pins continue
+// to work as RX/TX. It can be verified by changing the UART pins and writing to the UART. Output can 
+// be seen in the previous pins and new pins as well. 
+// Valid pin UART_PIN_NO_CHANGE is defined to (-1)
+// Negative Pin Number will keep it unmodified, thus this function can detach individual pins
+void uartDetachPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin)
+{
+    if(uart == NULL) {
+        return;
+    }
+
+    UART_MUTEX_LOCK();
+    if (txPin >= 0) {
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[txPin], PIN_FUNC_GPIO);
+        esp_rom_gpio_connect_out_signal(txPin, SIG_GPIO_OUT_IDX, false, false);
+    }
+
+    if (rxPin >= 0) {
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rxPin], PIN_FUNC_GPIO);
+        esp_rom_gpio_connect_in_signal(GPIO_FUNC_IN_LOW, UART_PERIPH_SIGNAL(uart->num, SOC_UART_RX_PIN_IDX), false);
+    }
+
+    if (rtsPin >= 0) {
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rtsPin], PIN_FUNC_GPIO);
+        esp_rom_gpio_connect_out_signal(rtsPin, SIG_GPIO_OUT_IDX, false, false);
+    }
+
+    if (ctsPin >= 0) {
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[ctsPin], PIN_FUNC_GPIO);
+        esp_rom_gpio_connect_in_signal(GPIO_FUNC_IN_LOW, UART_PERIPH_SIGNAL(uart->num, SOC_UART_CTS_PIN_IDX), false);
+    }
+    UART_MUTEX_UNLOCK();  
+}
+
 // solves issue https://github.com/espressif/arduino-esp32/issues/6032
 // baudrate must be multiplied when CPU Frequency is lower than APB 80MHz
 uint32_t _get_effective_baudrate(uint32_t baudrate) 
@@ -108,15 +145,16 @@ bool uartIsDriverInstalled(uart_t* uart)
 
 // Valid pin UART_PIN_NO_CHANGE is defined to (-1)
 // Negative Pin Number will keep it unmodified, thus this function can set individual pins
-void uartSetPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin)
+bool uartSetPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin)
 {
     if(uart == NULL) {
-        return;
+        return false;
     }
     UART_MUTEX_LOCK();
     // IDF uart_set_pin() will issue necessary Error Message and take care of all GPIO Number validation.
-    uart_set_pin(uart->num, txPin, rxPin, rtsPin, ctsPin); 
+    bool retCode = uart_set_pin(uart->num, txPin, rxPin, rtsPin, ctsPin) == ESP_OK; 
     UART_MUTEX_UNLOCK();  
+    return retCode;
 }
 
 // 

cores/esp32/esp32-hal-uart.h

@@ -91,8 +91,9 @@ int uartGetDebug();
 
 bool uartIsDriverInstalled(uart_t* uart);
 
-// Negative Pin Number will keep it unmodified, thus this function can set individual pins
-void uartSetPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin);
+// Negative Pin Number will keep it unmodified, thus this function can set/reset individual pins
+bool uartSetPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin);
+void uartDetachPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin);
 
 // Enables or disables HW Flow Control function -- needs also to set CTS and/or RTS pins
 void uartSetHwFlowCtrlMode(uart_t *uart, uint8_t mode, uint8_t threshold);