Skip to content

Commit 14db266

Browse files
jeromecoutantjeromecoutant
committed
Add MCU_STM32L071xB
1 parent a6a959a commit 14db266

File tree

20 files changed

+1678
-22
lines changed

20 files changed

+1678
-22
lines changed

‎README.md

Lines changed: 24 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -2,32 +2,34 @@
22

33
This branch is creating "generic" targets which are virtual boards with an STM32.
44

5-
Current status: 364 generic boards have created and tested with CLI1 and CLI2.
5+
Current status: 368 generic boards have created and tested with CLI1 and CLI2.
66

77
Real custom boards are in the main branch : https://github.com/ARMmbed/stm32customtargets
88

99

1010
Table of Contents
1111
=================
1212

13-
* [WOW](#WOW)
14-
* [STM32F0](#STM32F0)
15-
* [STM32F1](#STM32F1)
16-
* [STM32F2](#STM32F2)
17-
* [STM32F3](#STM32F3)
18-
* [STM32F4](#STM32F4)
19-
* [STM32F7](#STM32F7)
20-
* [STM32G0](#STM32G0)
21-
* [STM32G4](#STM32G4)
22-
* [STM32H7](#STM32H7)
23-
* [STM32L0](#STM32L0)
24-
* [STM32L1](#STM32L1)
25-
* [STM32L4](#STM32L4)
26-
* [STM32L5](#STM32L5)
27-
* [STM32U5](#STM32U5)
28-
* [STM32WB](#STM32WB)
29-
* [STM32WL](#STM32WL)
30-
* [License](#license)
13+
- [CUSTOM boards with STM32](#custom-boards-with-stm32)
14+
- [Table of Contents](#table-of-contents)
15+
- [WOW](#wow)
16+
- [STM32F0](#stm32f0)
17+
- [STM32F1](#stm32f1)
18+
- [STM32F2](#stm32f2)
19+
- [STM32F3](#stm32f3)
20+
- [STM32F4](#stm32f4)
21+
- [STM32F7](#stm32f7)
22+
- [STM32G0](#stm32g0)
23+
- [STM32G4](#stm32g4)
24+
- [STM32H7](#stm32h7)
25+
- [STM32L0](#stm32l0)
26+
- [STM32L1](#stm32l1)
27+
- [STM32L4](#stm32l4)
28+
- [STM32L5](#stm32l5)
29+
- [STM32U5](#stm32u5)
30+
- [STM32WB](#stm32wb)
31+
- [STM32WL](#stm32wl)
32+
- [License](#license)
3133

3234

3335
# WOW
@@ -379,14 +381,15 @@ python aci_build.py -l -c -b
379381
- mbed-os: master
380382
- STM32_open_pin_data: master
381383

382-
15 targets available thanks to:
384+
19 targets available thanks to:
383385
- MCU_STM32L053x8
386+
- MCU_STM32L071xB
384387
- MCU_STM32L071xZ
385388
- MCU_STM32L072xZ
386389
- MCU_STM32L073xZ
387390
- MCU_STM32L082xZ
388391

389-
30 missing targets due to missing:
392+
29 missing targets due to missing:
390393
- MCU_STM32L010x6
391394
- MCU_STM32L010x4
392395
- MCU_STM32L010x8
@@ -406,7 +409,6 @@ python aci_build.py -l -c -b
406409
- MCU_STM32L062x8
407410
- MCU_STM32L063x8
408411
- MCU_STM32L071x8
409-
- MCU_STM32L071xB
410412
- MCU_STM32L072xB
411413
- MCU_STM32L072x8
412414
- MCU_STM32L073xB

‎TARGET_STM32L0/CMakeLists.txt

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,13 @@
33

44
add_subdirectory(TARGET_GENERIC_STM32L053C8 EXCLUDE_FROM_ALL)
55
add_subdirectory(TARGET_GENERIC_STM32L053R8 EXCLUDE_FROM_ALL)
6+
add_subdirectory(TARGET_GENERIC_STM32L071CB EXCLUDE_FROM_ALL)
67
add_subdirectory(TARGET_GENERIC_STM32L071CZ EXCLUDE_FROM_ALL)
8+
add_subdirectory(TARGET_GENERIC_STM32L071KB EXCLUDE_FROM_ALL)
79
add_subdirectory(TARGET_GENERIC_STM32L071KZ EXCLUDE_FROM_ALL)
10+
add_subdirectory(TARGET_GENERIC_STM32L071RB EXCLUDE_FROM_ALL)
811
add_subdirectory(TARGET_GENERIC_STM32L071RZ EXCLUDE_FROM_ALL)
12+
add_subdirectory(TARGET_GENERIC_STM32L071VB EXCLUDE_FROM_ALL)
913
add_subdirectory(TARGET_GENERIC_STM32L071VZ EXCLUDE_FROM_ALL)
1014
add_subdirectory(TARGET_GENERIC_STM32L072CZ EXCLUDE_FROM_ALL)
1115
add_subdirectory(TARGET_GENERIC_STM32L072KZ EXCLUDE_FROM_ALL)

‎TARGET_STM32L0/TARGET_GENERIC_STM32L071CB/CMakeLists.txt

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
# Copyright (c) 2022 ARM Limited. All rights reserved.
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
add_library(mbed-generic-stm32l071cb INTERFACE)
5+
6+
target_sources(mbed-generic-stm32l071cb
7+
INTERFACE
8+
PeripheralPins.c
9+
system_clock.c
10+
)
11+
12+
target_include_directories(mbed-generic-stm32l071cb
13+
INTERFACE
14+
.
15+
)
16+
17+
target_link_libraries(mbed-generic-stm32l071cb INTERFACE mbed-stm32l071xb)

‎TARGET_STM32L0/TARGET_GENERIC_STM32L071CB/PeripheralPins.c

Lines changed: 201 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,201 @@
1+
/* mbed Microcontroller Library
2+
* SPDX-License-Identifier: BSD-3-Clause
3+
******************************************************************************
4+
*
5+
* Copyright (c) 2016-2022 STMicroelectronics.
6+
* All rights reserved.
7+
*
8+
* This software component is licensed by ST under BSD 3-Clause license,
9+
* the "License"; You may not use this file except in compliance with the
10+
* License. You may obtain a copy of the License at:
11+
* opensource.org/licenses/BSD-3-Clause
12+
*
13+
******************************************************************************
14+
*
15+
* Automatically generated from STM32CubeMX/db/mcu/STM32L071C(B-Z)Tx.xml
16+
*/
17+
18+
#include "PeripheralPins.h"
19+
#include "mbed_toolchain.h"
20+
21+
//==============================================================================
22+
// Notes
23+
//
24+
// - The pins mentioned Px_y_ALTz are alternative possibilities which use other
25+
// HW peripheral instances. You can use them the same way as any other "normal"
26+
// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board
27+
// pinout image on mbed.org.
28+
//
29+
// - The pins which are connected to other components present on the board have
30+
// the comment "Connected to xxx". The pin function may not work properly in this
31+
// case. These pins may not be displayed on the board pinout image on mbed.org.
32+
// Please read the board reference manual and schematic for more information.
33+
//
34+
// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented
35+
// See https://os.mbed.com/teams/ST/wiki/STDIO for more information.
36+
//
37+
//==============================================================================
38+
39+
40+
//*** ADC ***
41+
42+
MBED_WEAK const PinMap PinMap_ADC[] = {
43+
{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0
44+
{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1
45+
{PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2
46+
{PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3
47+
{PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4
48+
{PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5
49+
{PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6
50+
{PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7
51+
{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8
52+
{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9
53+
{NC, NC, 0}
54+
};
55+
56+
// !!! SECTION TO BE CHECKED WITH DEVICE REFERENCE MANUAL
57+
MBED_WEAK const PinMap PinMap_ADC_Internal[] = {
58+
// {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)},
59+
// {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)},
60+
// {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)},
61+
{NC, NC, 0}
62+
};
63+
64+
//*** I2C ***
65+
66+
MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
67+
{PA_10, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
68+
{PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I2C3)},
69+
{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
70+
{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
71+
{PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
72+
{PB_14, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C2)},
73+
{NC, NC, 0}
74+
};
75+
76+
MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
77+
{PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I2C3)},
78+
{PA_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
79+
{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
80+
{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
81+
{PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
82+
{PB_13, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C2)},
83+
{NC, NC, 0}
84+
};
85+
86+
//*** PWM ***
87+
88+
// TIM21 cannot be used because already used by the us_ticker
89+
// (update us_ticker_data.h file if another timer is chosen)
90+
MBED_WEAK const PinMap PinMap_PWM[] = {
91+
{PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
92+
{PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
93+
{PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
94+
// {PA_2, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_TIM21, 1, 0)}, // TIM21_CH1
95+
{PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
96+
// {PA_3, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_TIM21, 2, 0)}, // TIM21_CH2
97+
{PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_TIM2, 1, 0)}, // TIM2_CH1
98+
{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
99+
{PA_6_ALT0, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_TIM22, 1, 0)}, // TIM22_CH1
100+
{PA_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
101+
{PA_7_ALT0, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_TIM22, 2, 0)}, // TIM22_CH2
102+
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_TIM2, 1, 0)}, // TIM2_CH1
103+
{PB_0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
104+
{PB_1, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
105+
{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
106+
{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
107+
{PB_4_ALT0, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM22, 1, 0)}, // TIM22_CH1
108+
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM3, 2, 0)}, // TIM3_CH2
109+
{PB_5_ALT0, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM22, 2, 0)}, // TIM22_CH2
110+
{PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
111+
{PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
112+
// {PB_13, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_TIM21, 1, 0)}, // TIM21_CH1
113+
// {PB_14, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_TIM21, 2, 0)}, // TIM21_CH2
114+
{NC, NC, 0}
115+
};
116+
117+
//*** SERIAL ***
118+
119+
MBED_WEAK const PinMap PinMap_UART_TX[] = {
120+
{PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USART4)},
121+
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
122+
{PA_2_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
123+
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
124+
{PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
125+
{PA_14_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
126+
{PB_3, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USART5)},
127+
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
128+
{PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
129+
{PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_LPUART1)},
130+
{NC, NC, 0}
131+
};
132+
133+
MBED_WEAK const PinMap PinMap_UART_RX[] = {
134+
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USART4)},
135+
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
136+
{PA_3_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
137+
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
138+
{PA_13, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
139+
{PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
140+
{PB_4, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USART5)},
141+
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
142+
{PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_LPUART1)},
143+
{PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
144+
{NC, NC, 0}
145+
};
146+
147+
MBED_WEAK const PinMap PinMap_UART_RTS[] = {
148+
{PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
149+
{PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
150+
{PA_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USART4)},
151+
{PB_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
152+
{PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_USART1)},
153+
{PB_5, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USART5)},
154+
{PB_12, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_LPUART1)},
155+
{PB_14, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
156+
{NC, NC, 0}
157+
};
158+
159+
MBED_WEAK const PinMap PinMap_UART_CTS[] = {
160+
{PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
161+
{PA_6, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
162+
{PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
163+
{PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_USART1)},
164+
{PB_7, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USART4)},
165+
{PB_13, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
166+
{NC, NC, 0}
167+
};
168+
169+
//*** SPI ***
170+
171+
MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
172+
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
173+
{PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
174+
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
175+
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)},
176+
{NC, NC, 0}
177+
};
178+
179+
MBED_WEAK const PinMap PinMap_SPI_MISO[] = {
180+
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
181+
{PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
182+
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
183+
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)},
184+
{NC, NC, 0}
185+
};
186+
187+
MBED_WEAK const PinMap PinMap_SPI_SCLK[] = {
188+
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
189+
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
190+
{PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
191+
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)},
192+
{NC, NC, 0}
193+
};
194+
195+
MBED_WEAK const PinMap PinMap_SPI_SSEL[] = {
196+
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
197+
{PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
198+
{PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
199+
{PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)},
200+
{NC, NC, 0}
201+
};

0 commit comments

Comments
 (0)